SRL::Interrupt Class Reference

Detailed Description

Type-safe interrupt management for the Sega Saturn.

Provides a modern C++ interface over the BIOS interrupt services and direct SCU register access. Supports both SCU interrupts (0x40-0x4F) and CPU/TRAP vectors (0x60-0x8F) with compile-time validation.

Architecture:

Vector Range	Type	Return
0x40-0x4F	SCU Interrupts	rte (mandatory)
0x60-0x8F	CPU / TRAP	rts (default)

Basic Usage:

// Set interrupt mask (enable V-Blank only)
Interrupt::SetMask(Interrupt::Mask::VBlankIn);
 
// Register an SCU interrupt handler
void __attribute__((interrupt_handler)) myVBlank() { }
Interrupt::SetHandler(Interrupt::Vector::VBlankIn, &myVBlank);
 
// Check and clear interrupt status
if (static_cast<uint32_t>(Interrupt::GetStatus() & Interrupt::Status::VBlankIn)) {
    Interrupt::ResetStatus(Interrupt::Status::VBlankIn);
}

Warning

SCU interrupt handlers (0x40-0x4F) must use __attribute__((interrupt_handler)) to emit rte instead of rts. Omitting this attribute will crash on return from interrupt.

See also

System for the lower-level BIOS wrappers

Timer for FRT overflow interrupt usage

#include <srl_interrupt.hpp>

Public Types
enum class	Acknowledge : uint32_t {   None = 0x00000000 , VBlankIn = (1u << 0) , VBlankOut = (1u << 1) , HBlankIn = (1u << 2) ,   All = 0xFFFFFFFF }
	Interrupt acknowledge control values. More...
enum class	Mask : uint32_t {   None = 0 , VBlankIn = (1u << 0) , VBlankOut = (1u << 1) , HBlankIn = (1u << 2) ,   Timer0 = (1u << 3) , Timer1 = (1u << 4) , DspEnd = (1u << 5) , SoundReq = (1u << 6) ,   SystemMgr = (1u << 7) , Pad = (1u << 8) , Dma2 = (1u << 9) , Dma1 = (1u << 10) ,   Dma0 = (1u << 11) , Vdp1 = (1u << 12) , Vdp2 = (1u << 13) , Cpu = (1u << 14) ,   Default , All = 0x7FFF , User = (1u << 15) }
	Interrupt mask bits for the SCU. More...
enum class	Status : uint32_t {   VBlankIn = (1u << 0) , VBlankOut = (1u << 1) , HBlankIn = (1u << 2) , Timer0 = (1u << 3) ,   Timer1 = (1u << 4) , DspEnd = (1u << 5) , SoundReq = (1u << 6) , SystemMgr = (1u << 7) ,   Pad = (1u << 8) , Dma2 = (1u << 9) , Dma1 = (1u << 10) , Dma0 = (1u << 11) ,   Vdp1 = (1u << 12) , Vdp2 = (1u << 13) , Cpu = (1u << 14) , User = (1u << 15) ,   ABus = 0xFFFF0000 , VBlank = VBlankIn | VBlankOut , All = 0xFFFFFFFF }
	Interrupt status bits. More...
enum class	Vector : uint32_t {   VBlankIn = 0x40 , VBlankOut = 0x41 , HBlankIn = 0x42 , Timer0 = 0x43 ,   Timer1 = 0x44 , DspEnd = 0x45 , SoundReq = 0x46 , SystemMgr = 0x47 ,   Pad = 0x48 , Dma2 = 0x49 , Dma1 = 0x4A , Dma0 = 0x4B ,   Vdp1 = 0x4C , Vdp2 = 0x4D , Cpu = 0x4E , User = 0x4F ,   Reset = 0x60 , BusError = 0x61 , Address = 0x62 , Illegal = 0x63 ,   ZeroDiv = 0x64 , Chk = 0x65 , TrapV = 0x66 , Privilege = 0x67 ,   Trace = 0x68 , LineA = 0x69 , LineF = 0x6A , Spurious = 0x6B ,   Irq1 = 0x6C , Irq2 = 0x6D , Irq3 = 0x6E , HBlank = 0x6F ,   VBlank = 0x70 , Trap0 = 0x80 , Trap1 = 0x81 , Trap2 = 0x82 ,   Trap3 = 0x83 , Trap4 = 0x84 , Trap5 = 0x85 , Trap6 = 0x86 ,   Trap7 = 0x87 , Trap8 = 0x88 , Trap9 = 0x89 , TrapA = 0x8A ,   TrapB = 0x8B , TrapC = 0x8C , TrapD = 0x8D , TrapE = 0x8E ,   TrapF = 0x8F }
	Interrupt vector numbers. More...

Static Public Member Functions
Mask Control
Enable or disable SCU interrupt sources.
static void	SetMask (Mask mask)
	Replace the entire SCU interrupt mask.
static void	ChangeMask (Mask enable, Mask disable)
	Selectively modify the SCU interrupt mask.
Status and Acknowledge
Query and clear interrupt status / acknowledge registers.
static Status	GetStatus ()
	Read the SCU interrupt status register.
static void	ResetStatus (Status status)
	Clear interrupt status bits (write-1-to-clear).
static void	SetAcknowledge (Acknowledge ack)
	Set the A-Bus interrupt acknowledge register.
static Acknowledge	GetAcknowledge ()
	Read the A-Bus interrupt acknowledge register.

Handler Registration
Register interrupt handler functions with compile-time validation.
template<typename Func>
static bool	SetHandler (Vector vector, Func &&handler) noexcept
	Register an interrupt handler function.