|
strong |
Enumeration of CPLD register addresses These are offsets from CpldBaseAddr. The values 0x55 and 0xAA are likely part of a handshake or initialization sequence. Access to these registers is typically 8-bit or 16-bit; refer to the hardware documentation for specifics.
| Enumerator | |
|---|---|
| Cpld55 | Register Cpld55 (possibly handshake init/write 0x55). |
| CpldAa | Register CpldAa (possibly handshake init/write 0xAA). |
| CartCpldVer | Register: CPLD version (read-only). |
| CartBetaId | Register: Beta/ID identifier. |
| CpldIo | Register: General I/O control. |
| SdinBits | Register: SD input bits. |
| LedSetting | Register: LED settings (bitfield for colors/modes). |
| SdClkSet | Register: SD clock configuration. |
| RegStdoutBit | Register: Stdout bit (debug/output). |
| RegSdIo0 | Register: SD I/O port 0 (shared address with stdout bit). |
| RegSdIo1 | Register: SD I/O port 1. |
| RegSdIo2 | Register: SD I/O port 2. |
| RegSdIo3 | Register: SD I/O port 3. |
| RegSdReinsert | Register: SD reinsert/eject command. |
| RegSdWriteProtect | Register: SD write-protect / SD present status. |
